/* Copyright (c) 2025 Beijing Semidrive Technology Corporation
 * SPDX-License-Identifier: Apache-2.0
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 * http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */
/** *****************************************************************************************************
 * \file     Adc_PbCfg.c                                                                                *
 * \brief    AUTOSAR 4.3.1 MCAL adc config generate file                                                *
 *                                                                                                      *
 * <table>                                                                                              *
 * <tr><th>Date           <th>Version                                                                   *
 * <tr><td>2023/08/30     <td>1.0.0                                                                     *
 * </table>                                                                                             *
 *******************************************************************************************************/

#ifdef __cplusplus
extern "C" {
#endif

/********************************************************************************************************
 *                                      Include header files                                            *
 *******************************************************************************************************/
#include "Adc.h"
#include "Adc_Cfg.h"

/*******************************************************************************
**                      Global Macro Definitions                              **
*******************************************************************************/


/*******************************************************************************
**                        Internal Config Data                                **
*******************************************************************************/


#define ADC_START_SEC_CONST_UNSPECIFIED
#include "Adc_MemMap.h"
/* Config list for ADC channels */
static const Adc_ChannelConfigType ADC1_Group0ChannelConfig[2] = {
/** Traceability       : SWSR_ADC_001 SWSR_ADC_003 */
  {
    .logicalChannelId = 0U,     /* Index of the logical channel */
    .physicalChannelId = 8U,     /* Index of the physical channel */
    .sampleClock = 5U,     /* Sample time of channel */
    .channelMuxId = 0U,     /* Channel mux id */
  },
  {
    .logicalChannelId = 1U,     /* Index of the logical channel */
    .physicalChannelId = 9U,     /* Index of the physical channel */
    .sampleClock = 5U,     /* Sample time of channel */
    .channelMuxId = 0U,     /* Channel mux id */
  },
};

static const Adc_ChannelConfigType ADC1_Group1ChannelConfig[2] = {
/** Traceability       : SWSR_ADC_001 SWSR_ADC_003 */
  {
    .logicalChannelId = 0U,     /* Index of the logical channel */
    .physicalChannelId = 8U,     /* Index of the physical channel */
    .sampleClock = 5U,     /* Sample time of channel */
    .channelMuxId = 0U,     /* Channel mux id */
  },
  {
    .logicalChannelId = 1U,     /* Index of the logical channel */
    .physicalChannelId = 9U,     /* Index of the physical channel */
    .sampleClock = 5U,     /* Sample time of channel */
    .channelMuxId = 0U,     /* Channel mux id */
  },
};

static const Adc_ChannelConfigType ADC2_Group0ChannelConfig[2] = {
/** Traceability       : SWSR_ADC_001 SWSR_ADC_003 */
  {
    .logicalChannelId = 0U,     /* Index of the logical channel */
    .physicalChannelId = 10U,     /* Index of the physical channel */
    .sampleClock = 5U,     /* Sample time of channel */
    .channelMuxId = 0U,     /* Channel mux id */
  },
  {
    .logicalChannelId = 1U,     /* Index of the logical channel */
    .physicalChannelId = 11U,     /* Index of the physical channel */
    .sampleClock = 5U,     /* Sample time of channel */
    .channelMuxId = 0U,     /* Channel mux id */
  },
};

static const Adc_ChannelConfigType ADC2_Group1ChannelConfig[2] = {
/** Traceability       : SWSR_ADC_001 SWSR_ADC_003 */
  {
    .logicalChannelId = 0U,     /* Index of the logical channel */
    .physicalChannelId = 10U,     /* Index of the physical channel */
    .sampleClock = 5U,     /* Sample time of channel */
    .channelMuxId = 0U,     /* Channel mux id */
  },
  {
    .logicalChannelId = 1U,     /* Index of the logical channel */
    .physicalChannelId = 11U,     /* Index of the physical channel */
    .sampleClock = 5U,     /* Sample time of channel */
    .channelMuxId = 0U,     /* Channel mux id */
  },
};

static const Adc_ChannelConfigType ADC3_Group0ChannelConfig[2] = {
/** Traceability       : SWSR_ADC_001 SWSR_ADC_003 */
  {
    .logicalChannelId = 0U,     /* Index of the logical channel */
    .physicalChannelId = 12U,     /* Index of the physical channel */
    .sampleClock = 5U,     /* Sample time of channel */
    .channelMuxId = 6U,     /* Channel mux id */
  },
  {
    .logicalChannelId = 1U,     /* Index of the logical channel */
    .physicalChannelId = 13U,     /* Index of the physical channel */
    .sampleClock = 5U,     /* Sample time of channel */
    .channelMuxId = 6U,     /* Channel mux id */
  },
};

static const Adc_ChannelConfigType ADC3_Group1ChannelConfig[2] = {
/** Traceability       : SWSR_ADC_001 SWSR_ADC_003 */
  {
    .logicalChannelId = 0U,     /* Index of the logical channel */
    .physicalChannelId = 12U,     /* Index of the physical channel */
    .sampleClock = 5U,     /* Sample time of channel */
    .channelMuxId = 6U,     /* Channel mux id */
  },
  {
    .logicalChannelId = 1U,     /* Index of the logical channel */
    .physicalChannelId = 13U,     /* Index of the physical channel */
    .sampleClock = 5U,     /* Sample time of channel */
    .channelMuxId = 6U,     /* Channel mux id */
  },
};

#define ADC_STOP_SEC_CONST_UNSPECIFIED
#include "Adc_MemMap.h"

#define ADC_START_SEC_VAR_INIT_UNSPECIFIED
#include "Adc_MemMap.h"
/* Config list for ADC groups */

/* PRQA S 1554 1 */
static Adc_GroupConfigType Adc_GroupConfigPtr[6] = {
  {
    .belongUnitPhysicalId = ADC_INDEX_ADC1, /* physical identifier for HwUnit */
    .belongUnitLogicalId = 0U, /* Adc_HwUnitIndex */
    .groupRcRchtIndex = ADC_RC0_INDEX, /* unit dose not exist hardware trigger group */
	.notificationPtr = NULL_PTR,	/* NotificationPtr - no notification configured */
    .groupDmaBufferPtr = NULL_PTR, /* Group dma buffer when in dma mode. */
    .groupSoftwareTriggerFreq = 0U, /* Group software trigger frequncy. */
    .bufferBasePtr = NULL_PTR, /* BufferBasePtr */
    .groupAccessMode = ADC_ACCESS_MODE_SINGLE,	/* GroupAccessMode */
    .groupConvMode = ADC_CONV_MODE_ONESHOT,	/* GroupConvMode */
    .strBufferMode = ADC_STREAM_BUFFER_LINEAR,	/* StrBufferMode */
    .triggerSource = ADC_TRIGG_SRC_SW,	/* TriggerSource */
    .samplingTime = 1U,    /* LenOfStreamNumSamples */
    .groupChannelCfgPtr = ADC1_Group0ChannelConfig, /* Pointer to Channel config */
    .channelCount = 2U, /* Number of channels in the group. */
    .groupTransferType = ADC_INTERRUPT_MODE, /* TransferType  */
    .groupDmaChannelIndex = ADC_DMA_NO_USE,
    .coreAllocatedGrp = 0x00U, /* core belongs to which group */
    .priv = NULL_PTR,
  },
  {
    .belongUnitPhysicalId = ADC_INDEX_ADC1, /* physical identifier for HwUnit */
    .belongUnitLogicalId = 0U, /* Adc_HwUnitIndex */
    .groupRcRchtIndex = ADC_RC1_INDEX, /* unit dose not exist hardware trigger group */
	.notificationPtr = (Adc_NotificationFnPtrType)(Adc1_Group1_Notif),	/* NotificationPtr - no notification configured */
    .groupDmaBufferPtr = NULL_PTR, /* Group dma buffer when in dma mode. */
    .groupSoftwareTriggerFreq = 0U, /* Group software trigger frequncy. */
    .bufferBasePtr = NULL_PTR, /* BufferBasePtr */
    .groupAccessMode = ADC_ACCESS_MODE_SINGLE,	/* GroupAccessMode */
    .groupConvMode = ADC_CONV_MODE_CONTINUOUS,	/* GroupConvMode */
    .strBufferMode = ADC_STREAM_BUFFER_LINEAR,	/* StrBufferMode */
    .triggerSource = ADC_TRIGG_SRC_SW,	/* TriggerSource */
    .samplingTime = 1U,    /* LenOfStreamNumSamples */
    .groupChannelCfgPtr = ADC1_Group1ChannelConfig, /* Pointer to Channel config */
    .channelCount = 2U, /* Number of channels in the group. */
    .groupTransferType = ADC_INTERRUPT_MODE, /* TransferType  */
    .groupDmaChannelIndex = ADC_DMA_NO_USE,
    .coreAllocatedGrp = 0x00U, /* core belongs to which group */
    .priv = NULL_PTR,
  },
  {
    .belongUnitPhysicalId = ADC_INDEX_ADC2, /* physical identifier for HwUnit */
    .belongUnitLogicalId = 1U, /* Adc_HwUnitIndex */
    .groupRcRchtIndex = ADC_RC0_INDEX, /* unit dose not exist hardware trigger group */
	.notificationPtr = NULL_PTR,	/* NotificationPtr - no notification configured */
    .groupDmaBufferPtr = NULL_PTR, /* Group dma buffer when in dma mode. */
    .groupSoftwareTriggerFreq = 0U, /* Group software trigger frequncy. */
    .bufferBasePtr = NULL_PTR, /* BufferBasePtr */
    .groupAccessMode = ADC_ACCESS_MODE_STREAMING,	/* GroupAccessMode */
    .groupConvMode = ADC_CONV_MODE_CONTINUOUS,	/* GroupConvMode */
    .strBufferMode = ADC_STREAM_BUFFER_LINEAR,	/* StrBufferMode */
    .triggerSource = ADC_TRIGG_SRC_SW,	/* TriggerSource */
    .samplingTime = 3U,    /* LenOfStreamNumSamples */
    .groupChannelCfgPtr = ADC2_Group0ChannelConfig, /* Pointer to Channel config */
    .channelCount = 2U, /* Number of channels in the group. */
    .groupTransferType = ADC_INTERRUPT_MODE, /* TransferType  */
    .groupDmaChannelIndex = ADC_DMA_NO_USE,
    .coreAllocatedGrp = 0x00U, /* core belongs to which group */
    .priv = NULL_PTR,
  },
  {
    .belongUnitPhysicalId = ADC_INDEX_ADC2, /* physical identifier for HwUnit */
    .belongUnitLogicalId = 1U, /* Adc_HwUnitIndex */
    .groupRcRchtIndex = ADC_RC1_INDEX, /* unit dose not exist hardware trigger group */
	.notificationPtr = (Adc_NotificationFnPtrType)(Adc2_Group1_Notif),	/* NotificationPtr - no notification configured */
    .groupDmaBufferPtr = NULL_PTR, /* Group dma buffer when in dma mode. */
    .groupSoftwareTriggerFreq = 0U, /* Group software trigger frequncy. */
    .bufferBasePtr = NULL_PTR, /* BufferBasePtr */
    .groupAccessMode = ADC_ACCESS_MODE_STREAMING,	/* GroupAccessMode */
    .groupConvMode = ADC_CONV_MODE_CONTINUOUS,	/* GroupConvMode */
    .strBufferMode = ADC_STREAM_BUFFER_CIRCULAR,	/* StrBufferMode */
    .triggerSource = ADC_TRIGG_SRC_SW,	/* TriggerSource */
    .samplingTime = 4U,    /* LenOfStreamNumSamples */
    .groupChannelCfgPtr = ADC2_Group1ChannelConfig, /* Pointer to Channel config */
    .channelCount = 2U, /* Number of channels in the group. */
    .groupTransferType = ADC_INTERRUPT_MODE, /* TransferType  */
    .groupDmaChannelIndex = ADC_DMA_NO_USE,
    .coreAllocatedGrp = 0x00U, /* core belongs to which group */
    .priv = NULL_PTR,
  },
  {
    .belongUnitPhysicalId = ADC_INDEX_ADC3, /* physical identifier for HwUnit */
    .belongUnitLogicalId = 2U, /* Adc_HwUnitIndex */
    .groupRcRchtIndex = ADC_RCHT_INDEX, /* rcht index*/
	.notificationPtr = (Adc_NotificationFnPtrType)(Adc3_Group0_Notif),	/* NotificationPtr - no notification configured */
    .groupDmaBufferPtr = NULL_PTR, /* Group dma buffer when in dma mode. */
    .groupSoftwareTriggerFreq = 0U, /* Group software trigger frequncy. */
    .bufferBasePtr = NULL_PTR, /* BufferBasePtr */
    .groupAccessMode = ADC_ACCESS_MODE_SINGLE,	/* GroupAccessMode */
    .groupConvMode = ADC_CONV_MODE_ONESHOT,	/* GroupConvMode */
    .strBufferMode = ADC_STREAM_BUFFER_LINEAR,	/* StrBufferMode */
    .triggerSource = ADC_TRIGG_SRC_HW,	/* TriggerSource */
    .samplingTime = 1U,    /* LenOfStreamNumSamples */
    .groupChannelCfgPtr = ADC3_Group0ChannelConfig, /* Pointer to Channel config */
    .channelCount = 2U, /* Number of channels in the group. */
    .groupTransferType = ADC_INTERRUPT_MODE, /* TransferType  */
    .groupDmaChannelIndex = ADC_DMA_NO_USE,
    .coreAllocatedGrp = 0x00U, /* core belongs to which group */
    .priv = NULL_PTR,
  },
  {
    .belongUnitPhysicalId = ADC_INDEX_ADC3, /* physical identifier for HwUnit */
    .belongUnitLogicalId = 2U, /* Adc_HwUnitIndex */
    .groupRcRchtIndex = ADC_RC0_INDEX, /* unit dose not exist hardware trigger group */
	.notificationPtr = NULL_PTR,	/* NotificationPtr - no notification configured */
    .groupDmaBufferPtr = adc3_group1_buffer, /* Group dma buffer when in dma mode. */
    .groupSoftwareTriggerFreq = 0U, /* Group software trigger frequncy. */
    .bufferBasePtr = NULL_PTR, /* BufferBasePtr */
    .groupAccessMode = ADC_ACCESS_MODE_STREAMING,	/* GroupAccessMode */
    .groupConvMode = ADC_CONV_MODE_CONTINUOUS,	/* GroupConvMode */
    .strBufferMode = ADC_STREAM_BUFFER_CIRCULAR,	/* StrBufferMode */
    .triggerSource = ADC_TRIGG_SRC_SW,	/* TriggerSource */
    .samplingTime = 1U,    /* LenOfStreamNumSamples */
    .groupChannelCfgPtr = ADC3_Group1ChannelConfig, /* Pointer to Channel config */
    .channelCount = 2U, /* Number of channels in the group. */
    .groupTransferType = ADC_DMA_MODE, /* TransferType  */
    .groupDmaChannelIndex = ADC_DMA_CHNL0,
    .coreAllocatedGrp = 0x00U, /* core belongs to which group */
    .priv = NULL_PTR,
  },
};



/* Config list for HwUnits (AdcConfigSet_0) */
static Adc_HwUnitConfigType Adc_UnitConfigPtr[3] = {  {
    .hwModulePhysicalId = ADC_INDEX_ADC1, /* physical identifier for HwUnit */
    .hwModuleIndex = 0U, /* logical identifier for HwUnit */
    .syncClk = TRUE, /* adc sync clock for hw unit */
    .clk24Mused = FALSE, /* adc 24M clock for hw unit */
	.hwClockSrcDivider = 4U,  /* Adc_ClockSrc Divider */
    .startGroupIdInUnit = 0U, /* start group id of current Hw Unit */
    .groupCountPerUnit = 2U, /* group count in current Hw Unit */
    .unitDmaUsed = ADC_UNIT_DMA_UNUSED, /* dma used or not */
    .refVoltageSelect = ADC_INTERNAL_REF_5V, /* reference voltage select */
    .coreAllocatedUint = 0x00U, /* core belongs to which unit */
  },
  {
    .hwModulePhysicalId = ADC_INDEX_ADC2, /* physical identifier for HwUnit */
    .hwModuleIndex = 1U, /* logical identifier for HwUnit */
    .syncClk = TRUE, /* adc sync clock for hw unit */
    .clk24Mused = FALSE, /* adc 24M clock for hw unit */
	.hwClockSrcDivider = 4U,  /* Adc_ClockSrc Divider */
    .startGroupIdInUnit = 2U, /* start group id of current Hw Unit */
    .groupCountPerUnit = 2U, /* group count in current Hw Unit */
    .unitDmaUsed = ADC_UNIT_DMA_UNUSED, /* dma used or not */
    .refVoltageSelect = ADC_INTERNAL_REF_3P3V, /* reference voltage select */
    .coreAllocatedUint = 0x00U, /* core belongs to which unit */
  },
  {
    .hwModulePhysicalId = ADC_INDEX_ADC3, /* physical identifier for HwUnit */
    .hwModuleIndex = 2U, /* logical identifier for HwUnit */
    .syncClk = TRUE, /* adc sync clock for hw unit */
    .clk24Mused = FALSE, /* adc 24M clock for hw unit */
	.hwClockSrcDivider = 4U,  /* Adc_ClockSrc Divider */
    .startGroupIdInUnit = 4U, /* start group id of current Hw Unit */
    .groupCountPerUnit = 2U, /* group count in current Hw Unit */
    .unitDmaUsed = ADC_UNIT_DMA_USED, /* dma used or not */
    .refVoltageSelect = ADC_INTERNAL_REF_5V, /* reference voltage select */
    .coreAllocatedUint = 0x00U, /* core belongs to which unit */
  },
};
#define ADC_STOP_SEC_VAR_INIT_UNSPECIFIED
#include "Adc_MemMap.h"

#define ADC_START_SEC_CONST_UNSPECIFIED
#include "Adc_MemMap.h"
CONST (Adc_ConfigType, ADC_CONST) Adc_Config = {
    .adcUnitCfgPtr = Adc_UnitConfigPtr,
    .adcGroupCfgPtr = Adc_GroupConfigPtr,
    .unitCount = 3U,	/* Number of HwUnitConfigs */
    .groupCountAllUnit = 6U, /* All Groups Count*/
};
#define ADC_STOP_SEC_CONST_UNSPECIFIED
#include "Adc_MemMap.h"

#ifdef __cplusplus
  }
#endif
